included hub75sender and Flashgenerator

master
wolfgang 2 years ago
parent f34340cbdb
commit eb72e64d4b
  1. 16
      cl_full.py

@ -17,7 +17,8 @@ from liteeth.phy.ecp5rgmii import LiteEthPHYRGMII
from litex.build.generic_platform import *
from litex_boards.targets import colorlight_5a_75x
from basic_system.hub75sender import Hub75Sender
from basic_system.bit_to_flash import convertBitToFlashFile
_gpios = [
("gpio", 0, Pins("j4:1"), IOStandard("LVCMOS33")),
("gpio", 1, Pins("j4:5"), IOStandard("LVCMOS33")),
@ -62,7 +63,7 @@ def main():
args = parser.parse_args()
soc = colorlight_5a_75x.BaseSoC(board="5a-75b", revision="7.0",
sys_clk_freq = 80e6,
sys_clk_freq = 60e6,
use_internal_osc = args.use_internal_osc,
sdram_rate = args.sdram_rate,
**soc_core_argdict(args))
@ -85,15 +86,20 @@ def main():
ip_address="10.42.1.222",
udp_port=1234)
soc.submodules.led = GPIOOut(soc.platform.request("user_led_n"))
soc.add_csr("led")
#soc.submodules.led = GPIOOut(soc.platform.request("user_led_n"))
#soc.add_csr("led")
hub75 = Hub75Sender(64, 64)
soc.submodules += hub75
counter = Signal(32)
soc.sync += counter.eq(counter + 1)
soc.comb += soc.platform.request("user_led_n").eq(counter[24])
builder = Builder(soc, output_dir="build", csr_csv="scripts/csr.csv")
builder.build(**trellis_argdict(args), run=args.build)
if args.flash: # Convert Bit File to Jtag Write Flash command
name = os.path.join(builder.gateware_dir, soc.build_name)
os.system(f"./bit_to_flash.py {name}.bit {name}.svf.flash")
convertBitToFlashFile(name+".bit", name+".svf.flash")
load(name + ".svf.flash")
return

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