integrated Hub75 to cl_full

master
wolfgang 2020-10-03 14:26:35 +02:00
parent 0de4e47611
commit 7bdd95e1ff
1 changed files with 19 additions and 4 deletions

View File

@ -32,6 +32,16 @@ _gpios = [
("j5", 7, Pins("j5:8"), IOStandard("LVCMOS33")),
]
ios = [
("led", 0, Pins("j4:1 j4:5"), IOStandard("LVCMOS33")),
("j5", 0,
Subsignal("rgb", Pins("j5:0 j5:1 j5:2 j5:4 j5:5 j5:6")),
Subsignal("adr", Pins("j5:8 j5:9 j5:10 j5:11 j5:7")),
Subsignal("clk", Pins("j5:12")),
Subsignal("lat", Pins("j5:13")),
Subsignal("oen", Pins("j5:14")),
IOStandard("LVCMOS33"))
]
def load(file):
import os
@ -86,10 +96,15 @@ def main():
ip_address="10.42.1.222",
udp_port=1234)
#soc.submodules.led = GPIOOut(soc.platform.request("user_led_n"))
#soc.add_csr("led")
hub75 = Hub75Sender(64, 64)
soc.submodules += hub75
# GPIOs ------------------------------------------------------------------------------------
soc.platform.add_extension(ios)
# soc.submodules.led = GPIOOut(soc.platform.request("user_led_n"))
# soc.add_csr("led")
soc.submodules.hub = Hub75Sender(64, 64, (0xff, 0xe0, 0x1c, 0x03), soc.platform.request("j5"))
soc.add_csr("hub_mem")
soc.add_csr("hub")
counter = Signal(32)
soc.sync += counter.eq(counter + 1)
soc.comb += soc.platform.request("user_led_n").eq(counter[24])