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startup_LPC17xx.S 8.9KB

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  1. /* File: startup_ARMCM3.s
  2. * Purpose: startup file for Cortex-M3/M4 devices. Should use with
  3. * GNU Tools for ARM Embedded Processors
  4. * Version: V1.1
  5. * Date: 17 June 2011
  6. *
  7. * Copyright (C) 2011 ARM Limited. All rights reserved.
  8. * ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4
  9. * processor based microcontrollers. This file can be freely distributed
  10. * within development tools that are supporting such ARM based processors.
  11. *
  12. * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  13. * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  14. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  15. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  16. * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  17. */
  18. .syntax unified
  19. .arch armv7-m
  20. /* Memory Model
  21. The HEAP starts at the end of the DATA section and grows upward.
  22. The STACK starts at the end of the RAM and grows downward.
  23. The HEAP and stack STACK are only checked at compile time:
  24. (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
  25. This is just a check for the bare minimum for the Heap+Stack area before
  26. aborting compilation, it is not the run time limit:
  27. Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
  28. */
  29. .section .stack
  30. .align 3
  31. #ifdef __STACK_SIZE
  32. .equ Stack_Size, __STACK_SIZE
  33. #else
  34. .equ Stack_Size, 0xc00
  35. #endif
  36. .globl __StackTop
  37. .globl __StackLimit
  38. __StackLimit:
  39. .space Stack_Size
  40. .size __StackLimit, . - __StackLimit
  41. __StackTop:
  42. .size __StackTop, . - __StackTop
  43. .section .heap
  44. .align 3
  45. #ifdef __HEAP_SIZE
  46. .equ Heap_Size, __HEAP_SIZE
  47. #else
  48. .equ Heap_Size, 0x800
  49. #endif
  50. .globl __HeapBase
  51. .globl __HeapLimit
  52. __HeapBase:
  53. .space Heap_Size
  54. .size __HeapBase, . - __HeapBase
  55. __HeapLimit:
  56. .size __HeapLimit, . - __HeapLimit
  57. .section .isr_vector
  58. .align 2
  59. .globl __isr_vector
  60. __isr_vector:
  61. .long __StackTop /* Top of Stack */
  62. .long Reset_Handler /* Reset Handler */
  63. .long NMI_Handler /* NMI Handler */
  64. .long HardFault_Handler /* Hard Fault Handler */
  65. .long MemManage_Handler /* MPU Fault Handler */
  66. .long BusFault_Handler /* Bus Fault Handler */
  67. .long UsageFault_Handler /* Usage Fault Handler */
  68. .long 0 /* Reserved */
  69. .long 0 /* Reserved */
  70. .long 0 /* Reserved */
  71. .long 0 /* Reserved */
  72. .long SVC_Handler /* SVCall Handler */
  73. .long DebugMon_Handler /* Debug Monitor Handler */
  74. .long 0 /* Reserved */
  75. .long PendSV_Handler /* PendSV Handler */
  76. .long SysTick_Handler /* SysTick Handler */
  77. /* External interrupts */
  78. .long WDT_IRQHandler /* 16: Watchdog Timer */
  79. .long TIMER0_IRQHandler /* 17: Timer0 */
  80. .long TIMER1_IRQHandler /* 18: Timer1 */
  81. .long TIMER2_IRQHandler /* 19: Timer2 */
  82. .long TIMER3_IRQHandler /* 20: Timer3 */
  83. .long UART0_IRQHandler /* 21: UART0 */
  84. .long UART1_IRQHandler /* 22: UART1 */
  85. .long UART2_IRQHandler /* 23: UART2 */
  86. .long UART3_IRQHandler /* 24: UART3 */
  87. .long PWM1_IRQHandler /* 25: PWM1 */
  88. .long I2C0_IRQHandler /* 26: I2C0 */
  89. .long I2C1_IRQHandler /* 27: I2C1 */
  90. .long I2C2_IRQHandler /* 28: I2C2 */
  91. .long SPI_IRQHandler /* 29: SPI */
  92. .long SSP0_IRQHandler /* 30: SSP0 */
  93. .long SSP1_IRQHandler /* 31: SSP1 */
  94. .long PLL0_IRQHandler /* 32: PLL0 Lock (Main PLL) */
  95. .long RTC_IRQHandler /* 33: Real Time Clock */
  96. .long EINT0_IRQHandler /* 34: External Interrupt 0 */
  97. .long EINT1_IRQHandler /* 35: External Interrupt 1 */
  98. .long EINT2_IRQHandler /* 36: External Interrupt 2 */
  99. .long EINT3_IRQHandler /* 37: External Interrupt 3 */
  100. .long ADC_IRQHandler /* 38: A/D Converter */
  101. .long BOD_IRQHandler /* 39: Brown-Out Detect */
  102. .long USB_IRQHandler /* 40: USB */
  103. .long CAN_IRQHandler /* 41: CAN */
  104. .long DMA_IRQHandler /* 42: General Purpose DMA */
  105. .long I2S_IRQHandler /* 43: I2S */
  106. .long ENET_IRQHandler /* 44: Ethernet */
  107. .long RIT_IRQHandler /* 45: Repetitive Interrupt Timer */
  108. .long MCPWM_IRQHandler /* 46: Motor Control PWM */
  109. .long QEI_IRQHandler /* 47: Quadrature Encoder Interface */
  110. .long PLL1_IRQHandler /* 48: PLL1 Lock (USB PLL) */
  111. .long USBActivity_IRQHandler /* 49: USB Activity */
  112. .long CANActivity_IRQHandler /* 50: CAN Activity */
  113. .size __isr_vector, . - __isr_vector
  114. .text
  115. .thumb
  116. .thumb_func
  117. .align 2
  118. .globl Reset_Handler
  119. .type Reset_Handler, %function
  120. Reset_Handler:
  121. /* Loop to copy data from read only memory to RAM. The ranges
  122. * of copy from/to are specified by following symbols evaluated in
  123. * linker script.
  124. * _etext: End of code section, i.e., begin of data sections to copy from.
  125. * __data_start__/__data_end__: RAM address range that data should be
  126. * copied to. Both must be aligned to 4 bytes boundary. */
  127. ldr r1, =__etext
  128. ldr r2, =__data_start__
  129. ldr r3, =__data_end__
  130. .flash_to_ram_loop:
  131. cmp r2, r3
  132. ittt lt
  133. ldrlt r0, [r1], #4
  134. strlt r0, [r2], #4
  135. blt .flash_to_ram_loop
  136. ldr r0, =SystemInit
  137. blx r0
  138. ldr r0, =SystemPostInit
  139. blx r0
  140. ldr r0, =_start
  141. bx r0
  142. .pool
  143. .size Reset_Handler, . - Reset_Handler
  144. /* Macro to define default handlers. Default handler
  145. * will be weak symbol and just dead loops. They can be
  146. * overwritten by other handlers */
  147. .macro def_default_handler handler_name
  148. .align 1
  149. .thumb_func
  150. .weak \handler_name
  151. .type \handler_name, %function
  152. \handler_name :
  153. b .
  154. .size \handler_name, . - \handler_name
  155. .endm
  156. def_default_handler NMI_Handler
  157. def_default_handler HardFault_Handler
  158. def_default_handler MemManage_Handler
  159. def_default_handler BusFault_Handler
  160. def_default_handler UsageFault_Handler
  161. def_default_handler SVC_Handler
  162. def_default_handler DebugMon_Handler
  163. def_default_handler PendSV_Handler
  164. def_default_handler SysTick_Handler
  165. def_default_handler Default_Handler
  166. def_default_handler WDT_IRQHandler
  167. def_default_handler TIMER0_IRQHandler
  168. def_default_handler TIMER1_IRQHandler
  169. def_default_handler TIMER2_IRQHandler
  170. def_default_handler TIMER3_IRQHandler
  171. def_default_handler UART0_IRQHandler
  172. def_default_handler UART1_IRQHandler
  173. def_default_handler UART2_IRQHandler
  174. def_default_handler UART3_IRQHandler
  175. def_default_handler PWM1_IRQHandler
  176. def_default_handler I2C0_IRQHandler
  177. def_default_handler I2C1_IRQHandler
  178. def_default_handler I2C2_IRQHandler
  179. def_default_handler SPI_IRQHandler
  180. def_default_handler SSP0_IRQHandler
  181. def_default_handler SSP1_IRQHandler
  182. def_default_handler PLL0_IRQHandler
  183. def_default_handler RTC_IRQHandler
  184. def_default_handler EINT0_IRQHandler
  185. def_default_handler EINT1_IRQHandler
  186. def_default_handler EINT2_IRQHandler
  187. def_default_handler EINT3_IRQHandler
  188. def_default_handler ADC_IRQHandler
  189. def_default_handler BOD_IRQHandler
  190. def_default_handler USB_IRQHandler
  191. def_default_handler CAN_IRQHandler
  192. def_default_handler DMA_IRQHandler
  193. def_default_handler I2S_IRQHandler
  194. def_default_handler ENET_IRQHandler
  195. def_default_handler RIT_IRQHandler
  196. def_default_handler MCPWM_IRQHandler
  197. def_default_handler QEI_IRQHandler
  198. def_default_handler PLL1_IRQHandler
  199. def_default_handler USBActivity_IRQHandler
  200. def_default_handler CANActivity_IRQHandler
  201. .weak DEF_IRQHandler
  202. .set DEF_IRQHandler, Default_Handler
  203. .end