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The ULP Logger Project
** 🗣 This project is a work in progress ...**
This is a project using the ESP32 specific ULP (Ultra Low Power) feature. During its normal power saving operation, the system is sampling data from 4 analog channels (a simple runlength compression will be applied). When max. ULP local memory will become filled-up, the data is stored to SD-Card memory (thereby briefly waking up the two main xtensa cores).
To review data, a local switch has to be pressed to activate AP mode (WLAN). This enforces wake-up & thus normal (dual core) ESP32 operation. An HTTP server will become available as well, the data can now be retrieved via WEB access. WEB screen logic is stored within local SPIFFS. Non-ULP operation will be indicated by the blue on-board LED (using D2 terminal digital output). Be advised that the system is NOT connected to the internet (intentionally)! The AP function etc. may be terminated via the same switch.
Actually, we're using 10k pullups on these lines - as recommended by Espressif.
The ESP32 analog channels 0, 3, 6 & 7 are used via terminals D32 - D35. The AP activation switch shall be connected to D4 (digital input). Currently, there is a 'dump log files to terminal' function which can be initiated via D15 (digital input).
What's next ...
We're expecting a board design by psycho & some more details @ some later point in time ... maybe 🤔