An RV32IMF implementation w/ migen/LiteX
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Risq5/debugger/risq5dbg.py

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3.2 KiB

#!/usr/bin/env python3
#
# risq5dbg.py
# RISQ5 (remote) debugger
#
# Requires litex gateway server, start like (adjust path):
# ~/fpga/bin/lxserver --udp --udp-ip=192.168.1.20
#
# History:
# --------
# 20.01.21/KQ Initial version
#
import argparse
import time
from litex import RemoteClient
from qt5dbg import run_Qt5_GUI
from dbgeval import x_description, dumpregs
def risq5dbg(csr_csv):
wb = RemoteClient(csr_csv=csr_csv) # Access wishbone bus
wb.open() # To remote client ... (requires server up & running, s.a.)
print("RISQ5 debugger started ...")
#print("Entering single step mode")
wb.regs.risq5ext_b32mode.write(1) # Enable run, L1 cache will load (but will halt before 1. instruction!)
#print("PC adjusted to 0x40190078")
#wb.regs.risq5ext_b32_next_pc.write(0x40190078) # Provide a new PC address
#mode = wb.regs.risq5ext_b32mode.read() # Pick up current mode setting
#wb.regs.risq5ext_b32mode.write(mode | 16) # Adjust PC, will load L1 2nd time now
#wb.regs.risq5ext_b1_wb_reg_we.write(0) # Reset write requests (if any pending)
run_Qt5_GUI(wb) # Now switch to GUI (will never return!)
def main():
parser = argparse.ArgumentParser(description="RISQ5 Debugger Parser")
parser.add_argument("--csr-csv", default="build/csr.csv", help="CSR list location")
# Dummy args for not changing calling from VSC
parser.add_argument("--build", action="store_true", help="not used")
parser.add_argument("--load", action="store_true", help="not used")
parser.add_argument("--board", default="5a-75b", help="not used")
parser.add_argument("--revision", default="7.0", type=str, help="not used")
parser.add_argument("--with-ethernet", action="store_true", help="not used")
parser.add_argument("--with-etherbone", action="store_true", help="not used")
parser.add_argument("--eth-phy", default=0, type=int, help="not used")
parser.add_argument("--ip-address", default="192.168.1.50", help="not used")
parser.add_argument("--mac-address", default="0x726b895bc2e2", help="not used")
parser.add_argument("--sys-clk-freq", default=60e6, type=float, help="not used")
parser.add_argument("--use-internal-osc", action="store_true", help="not used")
parser.add_argument("--sdram-rate", default="1:1", help="not used")
parser.add_argument("--csr_csv", default="build/csr.csv", help="not used")
parser.add_argument("--doc", action="store_true", help="not used")
parser.add_argument("--flash", action="store_true", help="not used")
parser.add_argument("--uart-name", default="crossover", help="not used")
parser.add_argument("--isa-extension-m", action="store_true", help="RISC-V extension M")
parser.add_argument("--with-bios-for-none", action="store_true", help="Create ROM w/ BIOS even w/o CPU")
args = parser.parse_args()
risq5dbg(args.csr_csv) # Point of no return ...
if __name__ == "__main__":
a = 0xffffffff
b = 0xffffffff
c = a * b
print(hex(c))
main()