Browse Source

RAM boot ok!

master
kaqu 6 months ago
parent
commit
b925076f0b
6 changed files with 20137 additions and 20069 deletions
  1. +2
    -2
      .vscode/launch.json
  2. +100
    -12
      firmware/cmd_mem.c
  3. +6
    -28
      firmware/main.c
  4. +6
    -4
      neopixelar.py
  5. +2
    -2
      neopixelengine.py
  6. +20021
    -20021
      npe.vcd

+ 2
- 2
.vscode/launch.json View File

@ -10,8 +10,8 @@
"request": "launch",
"program": "${file}",
"args": ["--build",
//"--load", // May be used separately ...
"--flash", // May be used separately ...
"--load", // May be used separately ...
//"--flash", // May be used separately ...
"--revision=7.0",
"--uart-name=crossover",
//"--with-ethernet", // Not to be used together w/ etherbone! Won't TFTP ...


+ 100
- 12
firmware/cmd_mem.c View File

@ -316,6 +316,7 @@ define_command(wbw, wbw, "Write using softcontrol wishbone controller", MEM_CMDS
*
* Memory execute
*/
#ifdef CMD_MEM_MX
static void mx(int nb_params, char **params)
{
char *c;
@ -370,12 +371,14 @@ static void mx(int nb_params, char **params)
}
define_command(mx, mx, "Execute in RAM, optional: @address / signature hunt otherwise", MEM_CMDS);
#endif
/*
* Command "mhsig"
*
* Memory hunt signature
*/
#ifdef CMD_MEM_MHSIG
static void mhsig(int nb_params, char **params)
{
char *c;
@ -413,12 +416,14 @@ static void mhsig(int nb_params, char **params)
}
define_command(mhsig, mhsig, "RAM signature hunt", MEM_CMDS);
#endif
/*
* Command "dumpregs"
*
* Dump registers
*/
#ifdef CMD_MEM_DUMPREGS
// Register x
// versus ABI
#define REG_ZERO 0 // Fixed zero
@ -453,34 +458,48 @@ define_command(mhsig, mhsig, "RAM signature hunt", MEM_CMDS);
#define REG_t4 29 // Temporary
#define REG_t5 30 // Temporary
#define REG_t6 31 // Temporary
int32_t regs[32];
#define REG_oldpc 32 // --- No register!
#define CSR_mstatus 33 // Control & status register
#define CSR_mip 34
#define CSR_mie 35
#define CSR_mcause 36
#define CSR_mtvec 37
#define CSR_mtval 38
#define CSR_mepc 39
#define CSR_mscratch 40
#define CSR_misa 41 // ID regs.
#define CSR_mvendorid 42
#define CSR_marchid 43
#define CSR_mimpid 44
#define CSR_mhartid 45
int32_t regs[32+1+8+5]; // Only standard regs avail. + PC + machine mode CSR + CSR ID regs.
static void dumpregs(int nb_params, char **params)
{
__asm__ __volatile__ ("\
__asm__ __volatile__ ("\
nop \n\
lui t0,%hi(regs) # Load t0 w/ high adress of regs[] \n\
addi t0,t0,%lo(regs) # Add immediate t0=t0+ low adress regs[] \n\
# t0 now loaded with 64-bit pointer to regs[0] \n\
lw t1,56(sp) # Load stored return address (pc!) (64 bit) \n\
lw t1,60(sp) # Load stored return address (pc!) (64 bit) \n\
sw t1,0(t0) # Store to - unusable - zero (regs[REG_ZERO]) \n\
sw ra,4(t0) # Current return adress -> regs[REG_ra] \n\
sw sp,8(t0) # Stack pointer \n\
sw gp,12(t0) # Global pointer \n\
sw tp,16(t0) # Thread pointer \n\
sw t0,20(t0) # Temporary \n\
sw t0,20(t0) # Temporary / alternate link register \n\
sw t1,24(t0) # Temporary \n\
sw t2,28(t0) # Temporary \n\
sw fp,32(t0) # Frame pointer / saved register 0 \n\
sw s1,36(t0) # Saved register \n\
sw a0,40(t0) # Function argument / return value \n\
sw a1,44(t0) # Function argument / return value \n\
sw a2,48(t0) # Function argument / return value \n\
sw a3,52(t0) # Function argument / return value \n\
sw a4,56(t0) # Function argument / return value \n\
sw a5,60(t0) # Function argument / return value \n\
sw a6,64(t0) # Function argument / return value \n\
sw a7,68(t0) # Function argument / return value \n\
sw a2,48(t0) # Function argument \n\
sw a3,52(t0) # Function argument \n\
sw a4,56(t0) # Function argument \n\
sw a5,60(t0) # Function argument \n\
sw a6,64(t0) # Function argument \n\
sw a7,68(t0) # Function argument \n\
sw s2,72(t0) # Saved register \n\
sw s3,76(t0) # Saved register \n\
sw s4,80(t0) # Saved register \n\
@ -495,10 +514,40 @@ static void dumpregs(int nb_params, char **params)
sw t4,116(t0) # Temporary \n\
sw t5,120(t0) # Temporary \n\
sw t6,124(t0) # Temporary \n\
auipc t1,0 # Load current pc \n\
sw t1,128(t0) # Store current PC \n\
# Machine mode (level 3) registers \n\
csrr t1,mstatus # Interrupt enable & stati \n\
sw t1,132(t0) # Store mstatus \n\
csrr t1,mip # Machine interrupt pending \n\
sw t1,136(t0) # Store mip \n\
csrr t1,mie # Machine interrupt enable \n\
sw t1,140(t0) # Store mie \n\
csrr t1,mcause # Machine exception cause \n\
sw t1,144(t0) # Store mcause \n\
csrr t1,mtvec # Machine trap vector \n\
sw t1,148(t0) # Store mtvec \n\
csrr t1,mtval # Machine trap value \n\
sw t1,152(t0) # Store mtval \n\
csrr t1,mepc # Machine exception pc \n\
sw t1,156(t0) # Store mepc \n\
csrr t1,mscratch # Machine scratch \n\
sw t1,160(t0) # Store mscratch \n\
# Identification registers \n\
csrr t1,misa # Machine ISA \n\
sw t1,164(t0) # Store misa \n\
csrr t1,mvendorid # Machine vendor ID \n\
sw t1,168(t0) # Store mvendorid \n\
csrr t1,marchid # Machine base microarchitecture \n\
sw t1,172(t0) # Store marchid \n\
csrr t1,mimpid # Machine base microarchitecture version \n\
sw t1,176(t0) # Store mimpid \n\
csrr t1,mhartid # Machine hardware thread ('core') ID \n\
sw t1,180(t0) # Store mhartid \n\
nop \n\
");
printf("---- RISC-V (ABI: RV32I) ---- \n");
printf("Specials: zero=00000000h (ra(frame):%08Xh)\n", regs[REG_ZERO]);
printf("Specials: pc=%08Xh zero=00000000h (frame[ra]):%08Xh)\n", regs[REG_oldpc], regs[REG_ZERO]);
printf("Pointers: ra=%08Xh sp=%08Xh gp=%08Xh tp=%08Xh fp=%08Xh\n", regs[REG_ra], regs[REG_sp], regs[REG_gp], regs[REG_tp], regs[REG_fp_s0]);
printf("Temporaries: t0=%08Xh t1=%08Xh t2=%08Xh t3=%08Xh t4=%08Xh t5=%08Xh t6=%08Xh\n",
regs[REG_t0], regs[REG_t1], regs[REG_t2], regs[REG_t3], regs[REG_t4], regs[REG_t5], regs[REG_t6]);
@ -507,6 +556,45 @@ static void dumpregs(int nb_params, char **params)
regs[REG_s7], regs[REG_s8], regs[REG_s9], regs[REG_s10], regs[REG_s11]);
printf("Arg./Ret.: a0=%08Xh a1=%08Xh a2=%08Xh a3=%08Xh a4=%08Xh a5=%08Xh a6=%08Xh a7=%08Xh\n",
regs[REG_a0], regs[REG_a1], regs[REG_a2], regs[REG_a3], regs[REG_a4], regs[REG_a5], regs[REG_a6], regs[REG_a7]);
printf("-- Machine mode --\n");
printf("CSR: mstatus=%08Xh mip=%08Xh mie=%08Xh mcause=%08Xh mtvec=%08Xh mtval=%08Xh mepc=%08Xh mscratch=%08Xh\n",
regs[CSR_mstatus], regs[CSR_mip], regs[CSR_mie], regs[CSR_mcause],
regs[CSR_mtvec], regs[CSR_mtval], regs[CSR_mepc], regs[CSR_mscratch]);
printf("-- Identification CSRs --\n");
printf("CSR: misa=%08Xh mvendorid=%08Xh marchid=%08Xh mimpid=%08Xh mhartid=%08Xh\n",
regs[CSR_misa], regs[CSR_mvendorid], regs[CSR_marchid], regs[CSR_mimpid], regs[CSR_mhartid]);
}
define_command(dumpregs, dumpregs, "Dump processor registers", MEM_CMDS);
#endif
/*
* Command "ramboot"
*
* Try to boot from RAM
*/
static void ramboot(int nb_params, char **params)
{
extern void netboot(void);
char *c;
c = (char *)0x40000000; // MAIN_RAM_BASE
if( (*(c + 0) == 0xff)
&& (*(c + 1) == 0xff)
&& (*(c + 2) == 0xff)
&& (*(c + 3) == 0xff)
&& (*(c + 4) == 0xff)
&& (*(c + 5) == 0xff)
&& (*(c + 6) == 0xff)
&& (*(c + 7) == 0xff)
)
{
printf("No program loaded to RAM?!\n");
return;
}
netboot(); // Try to boot ...
}
define_command(dumpregs, dumpregs, "Dump processor registers", MEM_CMDS);
define_command(ramboot, ramboot, "Boot from RAM", MEM_CMDS);

+ 6
- 28
firmware/main.c View File

@ -125,6 +125,7 @@ void illumination(void)
enable_LEDS(1);
busy_wait(2000);
#ifdef MAIN_ILLUMINATION_EXTENSIVE_DEMO
// Let them flicker ...
for(int i=0;i<MAXLEDS;i++) {
int32_t temp = green;
@ -172,6 +173,7 @@ void illumination(void)
load_triple_LEDs(iTable, 0x010000, 0x000100, 0x000001); // 1st load
send_LEDs();
busy_wait(500);
#endif
enable_LEDS(0);
}
//------------------- End of illumination demo --------------------------
@ -264,7 +266,7 @@ int main(int i, char **c)
boot_sequence();
printf("\n");
}
#ifdef MAIN_RAM_EMPTY_CHECK
// RAM empty check
printf("RAM empty check ...\n");
#define RAMBASE 0x40000000
@ -316,7 +318,7 @@ int main(int i, char **c)
break;
}
}
#endif
printf("--============= \e[1mConsole\e[0m ================--\n");
#if !defined(TERM_MINI) && !defined(TERM_NO_HIST)
hist_init();
@ -329,32 +331,8 @@ int main(int i, char **c)
printf("\n");
nb_params = get_param(buffer, &command, params);
cmd = command_dispatcher(command, nb_params, params);
if (!cmd) {
printf("Command not found?!\n");
/*
if(*(unsigned char *)MAIN_RAM_BASE != (unsigned char)0xff)
{
// 00008067 ret <- Test data, fails?!
// 67800000 <- Byte order rearranged: Works!
printf("Command not found, trying jump to %08Xh ...\n", MAIN_RAM_BASE);
void (*fptr)(void);
fptr = MAIN_RAM_BASE;
(fptr)();
printf("Returned from jump to %08Xh.\n", MAIN_RAM_BASE);
}
//if(*(unsigned char *)MAIN_RAM_BASE != (unsigned char)0xff)
//{
//extern void boot_helper(unsigned long r1, unsigned long r2, unsigned long r3, unsigned long addr);
//printf("Memory @%08Xh not empty, trying to boot *.bin from RAM ...\n", MAIN_RAM_BASE);
//boot_helper(0, 0, 0, MAIN_RAM_BASE);
//while(1);
// extern void netboot(void);
// netboot();
//}
*/
}
if (!cmd)
printf("Command not found?!\n");
}
printf("\n%s", PROMPT);
}


+ 6
- 4
neopixelar.py View File

@ -13,9 +13,10 @@
#
# History:
# --------
# 14.10.20/KQ Initial version, some output ports activated (user_led, J4) for testing
# 15.10.20/KQ Own logic exported to external module (neopixelprotocol.py - now neopixelengine.py)
# 19.10.20/KQ Project renamed 'NeoPixelar' (swedish plural for NeoPixel ...)
# 14.09.20/KQ Initial version, some output ports activated (user_led, J4) for testing
# 15.09.20/KQ Own logic exported to external module (neopixelprotocol.py - now neopixelengine.py)
# 19.09.20/KQ Project renamed 'NeoPixelar' (swedish plural for NeoPixel ...)
# 16.10.20/KQ UART w/o crossover now, requires serial terminal
#
# Build/Use ----------------------------------------------------------------------------------------
# - 'python3 neopixelar.py --build --revision=7.0 --uart-name=crossover --with-etherbone --ip-address=192.168.1.20 --csr-csv=build/csr.csv'
@ -336,7 +337,8 @@ class BaseSoC(SoCCore):
self.sync += counter.eq(counter + 1)
# USERLED blink (on-board LED)
self.comb += platform.request("user_led_n").eq(counter[23]) # ~2Hz (?)
# only w/ uart-name=crossover option:
# self.comb += platform.request("user_led_n").eq(counter[23]) # ~2Hz (?)
platform.add_extension(_gpios) # General LED outputs


+ 2
- 2
neopixelengine.py View File

@ -268,7 +268,7 @@ def npe_testbench(npe):
yield
#
for i in range(10000): # Send the whole data & restart ...
print(i,": ", sep="", end="")
print(i, ": ", sep="", end="")
print((yield npe.bDataPin[0])) # Actual pin to move
yield
if i == 5000:
@ -277,4 +277,4 @@ def npe_testbench(npe):
if __name__ == "__main__":
npe = NeoPixelEngine(n_TABLES=2, n_LEDs=3)
run_simulation(npe, npe_testbench(npe), vcd_name="npe.vcd")
run_simulation(npe, npe_testbench(npe), vcd_name="npe.vcd", clocks={"sys":16})

+ 20021
- 20021
npe.vcd
File diff suppressed because it is too large
View File


Loading…
Cancel
Save