Finally booting flash w/o connected terminal!
kaqu
parent
73f226cc66
commit
4015caedc8
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@ -10,8 +10,8 @@
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"request": "launch",
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"program": "${file}",
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"args": ["--build",
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"--load", // May be used separately ...
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//"--flash", // May be used separately ...
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//"--load", // May be used separately ...
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"--flash", // May be used separately ...
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"--revision=7.0",
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"--uart-name=crossover",
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//"--with-ethernet", // Not to be used together w/ etherbone! Won't TFTP ...
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@ -0,0 +1,74 @@
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## Neopixelar - the FPGA project ##
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This project demonstrates the use of LiteX & migen to create a Neopixel driving FPGA based h/w unit,
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called NPE ('neopixel engine'). The project requires a colorlight-5a-75b board (sells at ~18€ currently). A RISC-V CPU (RV32I) is incorporated as well as network RAM loading (2 banks!) & separate application flashing capability (MUCH faster, bringing flashboot
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to life!).
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To use this project effectively, you will have to install LiteX, see https://github.com/enjoy-digital/litex for details.
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Also, it is recommended to install the board support, see https://github.com/litex-hub/litex-boards.
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To communicate with your board via network, install the wishbone tools, see https://github.com/litex-hub/wishbone-utils.
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For board specific details see https://github.com/enjoy-digital/colorlite/blob/master.
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Also, a JTAG programmer will be required for successful device programming. Thanx to Wolfgang, I'm using the Versaloon (s/w for blue-pill STM32), see https://github.com/zoobab/versaloon. To use this device, you also will have to install openocd:
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apt install openocd
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Other helpful links to board data:
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https://github.com/q3k/chubby75/blob/master/5a-75b/hardware_V7.0.md
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https://saturn.ffzg.hr/rot13/index.cgi?colorlight_5a_75b
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https://github.com/trabucayre/litexOnColorlightLab004/
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https://blog.pcbxprt.com/index.php/2020/07/19/running-risc-v-core-on-small-fpga-board/
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To use the automatic documentation feature, you will have to install sphinx, see https://www.sphinx-doc.org/en/master.
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Some helpful links for RST docstring formats:
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http://daouzli.com/blog/docstring.html
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https://thomas-cokelaer.info/tutorials/sphinx/rest_syntax.html
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## Program structure: ##
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*Neopixelar.py - this is the main FPGA building source
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*neopixelengine.py - this is the actual NeoPixel driving engine
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*helpers dir - contains python helpers for load & flash etc.
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*firmware dir - contains some modified BIOS files (relative to the original version)
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*software dir - contains a separate build, load & flash logic for separate (RV32i) application code
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the rest is of minor importance ...
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## QUICKSTART ##
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After installation of the relevant toolchains:
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1. Open the project in VSC (or use your favourite IDE & maybe adjust some settings ;), adjust local paths if nec. ...
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2. Connect your JTAG adapter as described in Wolfgang's documentation @ https://git.hacknology.de/wolfgang/colorlight
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3. Run neopixelar.py with these options (you may omit the --doc option if there is no Sphinx installed):
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--build --load --revision=7.0 --uart-name=crossover --with-etherbone --ip-address=192.168.1.20 --csr-csv=build/csr.csv --doc
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to create & load the project to on-board SRAM via the USB/JTAG-Adapter (this takes it's time ...)
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4. Connect a Neopixel LED chain to J4/Pin 1 (the logic supports 16 pins w/ 256 LEDs per chain, the demo features 3 pins w/ 27 LEDs each)
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5. Press reset on the board, the LED chain should become illuminated
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6. To program this base logic permanently, the board has to be improved, add a capacitor to stabilize the voltage for FPGA
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programming (see Wolfgang's documentation on https://git.hacknology.de/wolfgang/colorlight )
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7. Now run the same sequence as mentioned above, this time replacing the --load option with the --flash option
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8. This time it will take even longer ...
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9. And hopefully complete without errors. If successful, the basic ROM s/w is now in place & operating. In case of errors try again - rule out EMI disturbances if nec.
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10. Create the actual documentation for html via: 'sphinx-build -b html build/documentation build/documentation/html'
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11. Use your favourite browser to access the 'npe' units documentation via 'file://<projectpath>/build/documentation build/documentation/html/index.html'
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## Individual (separate) applications ##
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1. This time, open up a terminal & cd to the project local software subdirectory
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2. You can load an application to RAM bank 1:
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./ramcreate.sh main illumination 1
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3. To run the (now) RAM based application, type 'cd ..' within terminal
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4. Connect the Litex-Terminal to the board via: wishbone-tool --ethernet-host 192.168.1.20 --server terminal --csr-csv build/csr.csv
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5. Type 'ramboot' into terminal, the RAM based application should come up now
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6. Press 's' (Speedup) to speed up the lights, 'w' (sloWdown) to slow them down
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7. Press 'x' (eXit) to abort the application, you should see the LiteX prompt now
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6. You can load an application to RAM bank 2:
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./ramcreate.sh main illumination 2
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7. Now, use 'ramboot' again! The system should swap to RAM bank #2 and boot the application right away
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8. This is the testing loop, once your happy w/ your application, it needs to be flashed
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9. !CAREFULL NOW! The application shouldn't contain any errors as it will be booted right after the BIOS
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automatically
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10. Make sure, your JTAG adapter is in place!
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11. Run: ./ramcreate.sh main illumination 1
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and then: ./flashcreate.sh main illumination
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12. This flashes the application permanently to the boot address, where it will be verified by the BIOS
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and started automatically (the good news: the 64kBytes of the sample application only take some 18 s ...)
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Have fun!
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@ -0,0 +1,8 @@
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This directory contains the modified versions of several BIOS related files.
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The modifications are:
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boot.c - doRAMBoot introduced
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cmd_mem.c - dumpregs & ramboot introduced (mx, mhsig no longer used)
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console.c - set_console, kbhit introduced, putchar modified
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main.c - BIOS starter, modified for non-blocking operation
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@ -50,9 +50,9 @@ extern void boot_helper(unsigned long r1, unsigned long r2, unsigned long r3, un
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static void __attribute__((noreturn)) boot(unsigned long r1, unsigned long r2, unsigned long r3, unsigned long addr)
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{
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printf("Executing booted program at 0x%08x\n\n", addr);
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printf("--============= \e[1mLiftoff!\e[0m ===============--\n");
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uart_sync();
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//printf("Executing booted program at 0x%08x\n\n", addr);
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//printf("--============= \e[1mLiftoff!\e[0m ===============--\n");
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//uart_sync(); // This is a 'boot-locker'!
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#ifdef CONFIG_CPU_HAS_INTERRUPT
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irq_setmask(0);
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irq_setie(0);
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@ -455,17 +455,17 @@ static int copy_image_from_flash_to_ram(unsigned int flash_address, unsigned lon
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if(length > 0) {
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printf("Copying 0x%08x to 0x%08x (%d bytes)...\n", flash_address, ram_address, length);
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offset = 0;
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init_progression_bar(length);
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//init_progression_bar(length);
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while (length > 0) {
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uint32_t chunk_length;
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chunk_length = min(length, 0x8000); /* 32KB chunks */
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memcpy((void *) ram_address + offset, (void*) flash_address + offset + 8, chunk_length);
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offset += chunk_length;
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length -= chunk_length;
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show_progress(offset);
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//show_progress(offset);
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}
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show_progress(offset);
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printf("\n");
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//show_progress(offset);
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//printf("\n");
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return 1;
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}
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@ -595,7 +595,7 @@ static void ramboot(int nb_params, char **params)
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// Executing in RAM bank #1?
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if((cpc >= MAIN_RAM_BASE) && (cpc < (MAIN_RAM_BASE + (MAIN_RAM_SIZE / 2)))) {
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ramno = 2; // Boot RAM[2] hence!
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printf("\e[1mExecuting within RAM bank #1 -> Booting RAM banking #2 ...\e[0m\n");
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//printf("\e[1mExecuting within RAM bank #1 -> Booting RAM banking #2 ...\e[0m\n");
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c = (char *)(MAIN_RAM_BASE + (MAIN_RAM_SIZE / 2)); //0x40200000
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}
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else { // Nope, in RAM bank #2 assumed ...
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@ -26,10 +26,22 @@ void console_set_read_hook(console_read_hook r, console_read_nonblock_hook rn)
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#define MAX_WO_RESET 80
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static int output_count = 0;
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static int console_non_blocking = 0;
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static int uart_reset_count = 0;
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void set_console(int non_blocking)
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{
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console_non_blocking = non_blocking;
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if(non_blocking) {
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busy_wait(100);
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uart_init();
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if((++uart_reset_count) > 9999)
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uart_reset_count = 0;
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}
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}
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int get_console()
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{
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return (console_non_blocking | (uart_reset_count << 24) | (output_count << 16));
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}
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#endif
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@ -42,10 +54,12 @@ int putchar(int c)
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putchar('\r');
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#ifdef CONSOLE_NON_BLOCKING
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if(console_non_blocking != 0) {
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if(++output_count > MAX_WO_RESET) {
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if((++output_count) > MAX_WO_RESET) {
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extern void busy_wait(int);
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busy_wait(100); // Make sure, output has been sent (115200/8 -> 14400Byte -> 55ms/80Byte)
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uart_init(); // 'Unblock' ;-)
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if((++uart_reset_count) > 9999)
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uart_reset_count = 0;
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output_count = 0;
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}
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}
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@ -186,7 +186,11 @@ int main(int i, char **c)
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{
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extern char kbhit(void);
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extern void set_console(int non_blocking);
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extern int get_console(void);
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// Create our own start status indicator
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// Read command: 'mr 0x403ffffc 4'
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int32_t *statept = (int32_t *)(MAIN_RAM_BASE + MAIN_RAM_SIZE - sizeof(int32_t));
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char buffer[CMD_LINE_BUFFER_SIZE];
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char *params[MAX_PARAM];
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char *command;
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@ -204,14 +208,17 @@ int main(int i, char **c)
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#define CONSOLE_NON_BLOCKING 1
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#ifdef CONSOLE_NON_BLOCKING
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busy_wait(1000); // Permit remote (IP) terminal to connect ...
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printf("Press any key for full boot messages within 2s ...\n");
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non_blocking = 1; //<-- Test w/ 0! 1; // By default: show demo (=1)...
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printf("Press any key for full boot messages within 2s ...\n");
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non_blocking = 1; //<-- Test w/ 0! 1; // By default: show demo (=1)...
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for(int i=1;i<20;i++) {
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busy_wait(100);
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if(kbhit()) // Key pressed?
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if(kbhit()) { // Key pressed?
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non_blocking = 0; // Yap! Switch to blocking/full boot screen
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}
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break;
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}
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}
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set_console(non_blocking); // 1=Non-blocking (0=blocking)
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*statept = get_console(); // Make sure, we know what was going on ...
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if(non_blocking) printf("\e[1mBoot screen skipped, going straight to illumination ...\e[0m\n");
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#endif
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#ifdef CONSOLE_NON_BLOCKING
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if(!non_blocking)
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set_console(1); // Allways non-blocking from now on ...
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*statept = get_console(); // Make sure, we know what's going on ...
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#endif
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while(1) {
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readline(buffer, CMD_LINE_BUFFER_SIZE);
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@ -312,6 +320,7 @@ int main(int i, char **c)
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if (!cmd)
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printf("Command not found?!\n");
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}
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*statept = get_console(); // Make sure, we know what's going on ...
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printf("\n%s", PROMPT);
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}
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return 0;
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@ -16,7 +16,6 @@
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# 14.09.20/KQ Initial version, some output ports activated (user_led, J4) for testing
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# 15.09.20/KQ Own logic exported to external module (neopixelprotocol.py - now neopixelengine.py)
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# 19.09.20/KQ Project renamed 'NeoPixelar' (swedish plural for NeoPixel ...)
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# 16.10.20/KQ UART w/o crossover now, requires serial terminal
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#
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# Build/Use ----------------------------------------------------------------------------------------
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# - 'python3 neopixelar.py --build --revision=7.0 --uart-name=crossover --with-etherbone --ip-address=192.168.1.20 --csr-csv=build/csr.csv'
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@ -27,7 +26,7 @@
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# You should see the LiteX BIOS and be able to interact with it
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# - To load a file to RAM (@0x40000000 len=0x400000) use:
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# wishbone-tool --ethernet-host 192.168.1.20 --server load-file --csr-csv build/csr.csv
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# --load-address 0x40100000
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# --load-address 0x40000000
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# --load-name build/colorlight_5a_75b/software/<filename>
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# To disassemble raw file:
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# ../fpga/litex/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-objdump
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@ -387,7 +386,7 @@ def main():
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sdram_rate = args.sdram_rate,
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**soc_core_argdict(args))
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# 32MBit SPIFlash (not used currently) ---------------------------------------------------------------
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# 32MBit SPIFlash ------------------------------------------------------------------------
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flashbase = 0xc0000000
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flashoffset = 0x100000 # Used to be zero (default)
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soc.mem_map["spiflash"] = flashbase # Length: 0x01000000 ('til 0xc1000000 - 1)
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@ -414,7 +413,7 @@ def main():
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name = os.path.join(builder.gateware_dir, soc.build_name)
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print(f"Executing ./bit_to_flash.py {name}.bit {name}.svf.flash")
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from helpers.bit_to_flash import convertBitToFlashFile
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convertBitToFlashFile(name + ".bit", name + ".svf.flash", address=flashoffset)
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convertBitToFlashFile(name + ".bit", name + ".svf.flash", address=0)
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from helpers.load_to_flash import load2flash
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load2flash(name + ".svf.flash")
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return
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@ -0,0 +1,2 @@
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This directory contains the actual application & the loading/flashing tools.
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@ -9,7 +9,11 @@
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# 23.10.20/KQ Worx great now!
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#
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echo "Preparing flash image ..."
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./ramcreate.sh main illumination 1
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echo "Flashing image ..."
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cd ..
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python3 helpers/imageflasher.py
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cd software
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cd software
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echo "Done."
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@ -1,89 +0,0 @@
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INCLUDE linker/output_format.ld
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/* ENTRY(_start) */
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ENTRY(illumination)
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INCLUDE ../build/colorlight_5a_75b/software/include/generated/regions.ld
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MEMORY {
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spiflboot : ORIGIN = 0xc0100000, LENGTH = 0x00E00000
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}
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SECTIONS
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{
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.text :
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{
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_ftext = .;
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/* Make sure crt0 files come first, and they, and the isr */
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/* don't get disposed of by greedy optimisation */
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*crt0*(.text)
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KEEP(*crt0*(.text))
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KEEP(*(.text.isr))
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*(.text .stub .text.* .gnu.linkonce.t.*)
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_etext = .;
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} > spiflboot
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.rodata :
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{
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. = ALIGN(8);
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_frodata = .;
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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*(.rodata1)
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*(.got .got.*)
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*(.toc .toc.*)
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/* Make sure the file is aligned on disk as well
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as in memory; CRC calculation requires that. */
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FILL(0);
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. = ALIGN(8);
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_erodata = .;
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} > spiflboot
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.commands :
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{
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PROVIDE_HIDDEN (__bios_cmd_start = .);
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KEEP(*(.bios_cmd))
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PROVIDE_HIDDEN (__bios_cmd_end = .);
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} > spiflboot
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.data :
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{
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. = ALIGN(8);
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_fdata = .;
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*(.data .data.* .gnu.linkonce.d.*)
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*(.data1)
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*(.sdata .sdata.* .gnu.linkonce.s.*)
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/* Make sure the file is aligned on disk as well
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as in memory; CRC calculation requires that. */
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FILL(0);
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. = ALIGN(8);
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_edata = .;
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} > sram AT > spiflboot
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.bss :
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{
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. = ALIGN(8);
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_fbss = .;
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*(.dynsbss)
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*(.sbss .sbss.* .gnu.linkonce.sb.*)
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*(.scommon)
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*(.dynbss)
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(8);
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_ebss = .;
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_end = .;
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} > sram AT > spiflboot
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/DISCARD/ :
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{
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*(.eh_frame)
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*(.comment)
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}
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}
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PROVIDE(_fstack = ORIGIN(sram) + LENGTH(sram) - 8);
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PROVIDE(_fdata_rom = LOADADDR(.data));
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PROVIDE(_edata_rom = LOADADDR(.data) + SIZEOF(.data));
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@ -78,6 +78,8 @@ fi
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echo "--"
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echo "Creating flashable image"
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python3 -m litex.soc.software.mkmscimg build/$1.bin --little --fbi --output build/$1.img
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#<<<--- TEST ONLY!
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#cp build/$1.bin build/$1.img
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echo "--"
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echo "loading build/$1.bin to RAM base via wishbone-tool"
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if [ "$3" = "1" ]; then
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@ -0,0 +1,5 @@
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main.c - This is the rudimentary BIOS loop
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illumination.c - This is a sample application, demonstrating the use
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of the 'neopixelengine' (the documentation can be found
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under ./build/documentation/http/index.html)
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@ -128,7 +128,10 @@ int illumination(void)
|
|||
load_triple_LEDs(iTable, green, red, blue);
|
||||
send_LEDs();
|
||||
busy_wait(iDelay); // Slow down a bit
|
||||
if(key_eval()) return 1;
|
||||
if(key_eval()) {
|
||||
enable_LEDS(0);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
// Make 3 run along ...
|
||||
green = 0x404000;
|
||||
|
|
@ -149,7 +152,10 @@ int illumination(void)
|
|||
arLEDBuffer[iTable][max_LED - j] = arLEDBuffer[iTable][(max_LED - 1) - j];
|
||||
arLEDBuffer[iTable][i] = 0;
|
||||
}
|
||||
if(key_eval()) return 1;
|
||||
if(key_eval()) {
|
||||
enable_LEDS(0);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
printf("Halfway thru ...\n");
|
||||
for(int i=0;i<MAXLEDS-1;i++) { // Backward shift 3
|
||||
|
|
@ -160,7 +166,10 @@ int illumination(void)
|
|||
arLEDBuffer[iTable][j] = arLEDBuffer[iTable][j+1];
|
||||
arLEDBuffer[iTable][max_LED-i] = 0;
|
||||
}
|
||||
if(key_eval()) return 1;
|
||||
if(key_eval()) {
|
||||
enable_LEDS(0);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
busy_wait(400);
|
||||
|
||||
|
|
|
|||
|
|
@ -47,13 +47,16 @@ extern char kbhit(void);
|
|||
#define CONSOLE_NON_BLOCKING 1
|
||||
#ifdef CONSOLE_NON_BLOCKING
|
||||
extern void set_console(int non_blocking);
|
||||
extern int get_console(void);
|
||||
#endif
|
||||
extern int readchar_nonblock(void);
|
||||
|
||||
extern int32_t cpc; // Current PC storage
|
||||
static int32_t mycpc; // Current PC storage
|
||||
|
||||
int main(int i, char **c)
|
||||
{
|
||||
// Create our own start status indicator
|
||||
// Read command: 'mr 0x403ffffc 4'
|
||||
int32_t *statept = (int32_t *)(MAIN_RAM_BASE + MAIN_RAM_SIZE - sizeof(int32_t));
|
||||
char buffer[CMD_LINE_BUFFER_SIZE];
|
||||
char *params[MAX_PARAM];
|
||||
char *command;
|
||||
|
|
@ -64,26 +67,44 @@ int main(int i, char **c)
|
|||
irq_setmask(0);
|
||||
irq_setie(1);
|
||||
#endif
|
||||
uart_init();
|
||||
// Prepare first output
|
||||
int32_t green = 0x040201;
|
||||
int32_t red = 0x010402;
|
||||
int32_t blue = 0x020104;
|
||||
int iTable;
|
||||
|
||||
iTable = 0;
|
||||
load_triple_LEDs(iTable, green, red, blue); // 1st load
|
||||
iTable = 1;
|
||||
load_triple_LEDs(iTable, red, blue, green);
|
||||
iTable = 2;
|
||||
load_triple_LEDs(iTable, blue, green, red);
|
||||
send_LEDs();
|
||||
enable_LEDS(1);
|
||||
busy_wait(2000);
|
||||
enable_LEDS(0);
|
||||
|
||||
uart_init();
|
||||
|
||||
printf("\n");
|
||||
// Verify we're executing within RAM ...
|
||||
__asm__ __volatile__ ("\
|
||||
lui t0,%hi(cpc) # Load t0 w/ high adress of cpc \n\
|
||||
addi t0,t0,%lo(cpc) # Add immediate t0=t0 + low adress cpc \n\
|
||||
lui t0,%hi(mycpc) # Load t0 w/ high adress of cpc \n\
|
||||
addi t0,t0,%lo(mycpc) # Add immediate t0=t0 + low adress cpc \n\
|
||||
# t0 now loaded with pointer to cpc \n\
|
||||
auipc t1,0 # Load current pc \n\
|
||||
sw t1,0(t0) # Store current PC \n\
|
||||
");
|
||||
if((cpc >= MAIN_RAM_BASE) && (cpc <= (MAIN_RAM_BASE + MAIN_RAM_SIZE))) {
|
||||
printf("\e[1mExecuting within RAM ...\e[0m\n");
|
||||
if((mycpc >= MAIN_RAM_BASE) && (mycpc < (MAIN_RAM_BASE + MAIN_RAM_SIZE))) {
|
||||
#ifdef CONSOLE_NON_BLOCKING
|
||||
set_console(1); // 1=Non-blocking (0=standard/blocking)
|
||||
*statept = get_console(); // Make sure, we know what was going on ...
|
||||
#endif
|
||||
printf("\e[1mExecuting within RAM ...\e[0m\n");
|
||||
while(1)
|
||||
if(illumination()) // The DEMO !
|
||||
break;
|
||||
|
||||
*statept = get_console(); // Make sure, we know what was going on ...
|
||||
while(1) {
|
||||
printf("\n%s", PROMPT);
|
||||
readline(buffer, CMD_LINE_BUFFER_SIZE);
|
||||
|
|
@ -96,10 +117,13 @@ int main(int i, char **c)
|
|||
illumination(); // more DEMO ...
|
||||
}
|
||||
}
|
||||
#ifdef CONSOLE_NON_BLOCKING
|
||||
*statept = get_console(); // Make sure, we know what was going on ...
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else
|
||||
printf("Non-RAM execution @%08Xh, no action ...\n", cpc);
|
||||
//else
|
||||
// printf("Non-RAM execution @%08Xh, no action ...\n", cpc);
|
||||
while(1);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue