Practicle application tests & adjustments

neopixelar.py

@@ -390,7 +390,7 @@ class BaseSoC(SoCCore):
         self.add_csr("systime")
 
         # DRAM test
-        MAXWORDS = 32 # Transfer length x 32-bit, FIFO depth
+        MAXWORDS = 512 #32 # Transfer length x 32-bit, FIFO depth
         self.submodules.mm2s = mm2s = LiteDRAMDMAReader(self.sdram.crossbar.get_port(), fifo_depth=MAXWORDS, fifo_buffered=True)
         mm2s.add_csr()
         self.add_csr("mm2s")
@@ -400,8 +400,8 @@ class BaseSoC(SoCCore):
         self.add_csr("dramtransfer")         
         
         # Adjust no. for your actual project ...
-        max_TABLES = 2 # 1..16
-        max_LEDS_per_chain = MAXWORDS # 1..256 
+        max_TABLES = 64 #2 # 1..64
+        max_LEDS_per_chain = MAXWORDS # 1..512 
         self.submodules.npe = NeoPixelEngine(n_TABLES=max_TABLES, n_LEDs=max_LEDS_per_chain, dramtransfer=dramtransfer)
         self.add_csr("npe")         
         for i in range(42,56+2): # Example: Do output on J4 (14) & J5 (2)

neopixelengine.py

@@ -71,8 +71,8 @@ class NeoPixelEngine(Module, AutoCSR, AutoDoc, ModuleDoc):
     :bDataPin:      NeoPixel 'Din' pin output (wire to actual output pin ... ;)
     """
     def __init__(self, n_TABLES=1, n_LEDs=3, dramtransfer=None):        
-        # On Colorlight-5A-75B/Lattice ECP5-25 (@i7/4th gen.):
-        # 16 pins simultaneously driven (w/ 256 NeoPixels each) yield 94%
+        # On Colorlight-5A-75B/Lattice ECP5-25:
+        # 63 pins simultaneously driven (w/ 511 NeoPixels each!) yield 82% FPGA TRELLIS SLICE usage
         
         # Inputs        
         self.b32DRAMAddress = CSRStorage(32, reset_less=True, 
@@ -93,7 +93,7 @@ class NeoPixelEngine(Module, AutoCSR, AutoDoc, ModuleDoc):
             No. of actually used different DRAM address blocks
             """)        
         self.b9Len = CSRStorage(9, reset_less=True, 
-            fields=[CSRField("Len", size=8, description="*Field*: 8-Bit value (0..max)")],
+            fields=[CSRField("Len", size=9, description="*Field*: 9-Bit value (0..511)")],
             description="""
             No. of active (GRB) entries.
             Indicate actual # of elements used (may be less than max!)
@@ -134,7 +134,7 @@ class NeoPixelEngine(Module, AutoCSR, AutoDoc, ModuleDoc):
             self.sync += dramtransfer.b9Offset.storage.eq(self.b9Offset) # Index DRAM data value storage
 
         # Output
-        self.bDataPin = Array(Signal(1) for bit in range(64)) # To be wired to data pins ...
+        self.bDataPin = Array(Signal(1) for bit in range(63)) # To be wired to data pins ...
                                                               
         ###        
         fsm = FSM(reset_state="IDLETABLE") # FSM starts idling ...

software/linker/ram1.ld

@@ -4,7 +4,7 @@ ENTRY(_start)
 INCLUDE ../build/colorlight_5a_75b/software/include/generated/regions.ld
 
 MEMORY {
-	main_sram : ORIGIN = 0x403C0000, LENGTH = 0x00040000
+	main_sram : ORIGIN = 0x40380000, LENGTH = 0x00080000
 }
 
 SECTIONS

software/linker/ram2.ld

@@ -5,7 +5,7 @@ INCLUDE ../build/colorlight_5a_75b/software/include/generated/regions.ld
 
 MEMORY {
 	main_ram2 : ORIGIN = 0x40200000, LENGTH = 0x00200000
-	main_sram : ORIGIN = 0x403C0000, LENGTH = 0x00040000
+	main_sram : ORIGIN = 0x40380000, LENGTH = 0x00080000
 }
 
 SECTIONS

software/source/illumination.c

@@ -44,8 +44,12 @@
 #include "../include/illumination.h"
 
 extern void busy_wait(unsigned int ms); // Worx!
-#define MAXTABLES 2 // 0..63 MUST match h/w!
-#define MAXLEDS 32 //27 // 1..256 MUST match h/w!
+
+// Considering timing: 2x 511 (1022 LEDs) or 63x 24 (1512 LEDs) superfast
+//                     3x 511 (1533 LEDs) or 63x 48 (3024 LEDs) fast enough
+//	 				   4x 511 (2044 LEDs) or 63x 64 (4032 LEDs) slow (slower than CPU mem. modification, s.b.)
+#define MAXTABLES 6 // 1..64 MUST match h/w! Use Power of 2!
+#define MAXLEDS 144 // 1..512 MUST match h/w! Use Power of 2!
 static int32_t arLEDBuffer[MAXTABLES][MAXLEDS]  __attribute__((aligned(16)));; // GRB values
 
 extern char kbhit(void);
@@ -74,10 +78,10 @@ void enable_LEDS(int iEnable)
 	static uint32_t uiLoopCount = 0;
 	
 	if(iEnable) {
-		npe_b6NoOfTables_write(MAXTABLES); // Prepare # of tables
-		npe_b9Len_write(MAXLEDS); // Prepare length
+		npe_b6NoOfTables_write(MAXTABLES > 63? 63 : MAXTABLES ); // Prepare # of tables (0..63)
+		npe_b9Len_write(MAXLEDS > 511? 511 : MAXLEDS); // Prepare length (0..511)
 		for(int j=0;j<MAXTABLES;j++) {
-			printf("DRAM->[%d] = %08Xh\n", j, (uint32_t)&arLEDBuffer[j]);
+			//printf("DRAM->[%d] = %08Xh\n", j, (uint32_t)&arLEDBuffer[j]);
 			npe_b6StoreOffset_write(j); // Indicate which entry to use for address storage
 			npe_b32DRAMAddress_write((uint32_t)&arLEDBuffer[j]); // Base address of LED buffer
 		}
@@ -131,7 +135,7 @@ int illumination(void)
 	busy_wait(2000);
 
 	// Let them flicker ...	
-	for(int i=0;i<MAXLEDS;i++) {
+	for(int i=0;i<100;i++) {
 		int32_t temp = green;
 		green = red;
 		red = blue;
@@ -161,7 +165,7 @@ int illumination(void)
 		arLEDBuffer[iTable][1] = red;
 		arLEDBuffer[iTable][2] = blue;
 	}
-	int max_LED = MAXLEDS-1; // 0..26
+	int max_LED = MAXLEDS-1; // 1..512
 	for(int i=0;i<MAXLEDS-3;i++) { // Forward shift 3
 		flush_l2_cache(); // Strictly nec. for longer transfers
 		busy_wait(iDelay);